"Improving Z-Interference and Program Disturbance in 3D NAND Flash Memory Using Asymmetric Program-Pass Voltage" (submitted)   



"Unveiling Parasitic Capacitance Effects and Introducing Buried Structure for Enhanced RF Performance in 2-D Channel Devices" (submitted)   



J. K. Park, and S. K. Hong, " A New 3-Dimensional Vertical Transistor with Channel Length Determination Using Dielectric Thickness", Electronics. 13, no. 7: 1356.



Jihun Kim, Nam Ki Hwang, Seul Ki Hong, Min Ju Kim and Jong Kyung Park, "Facilitating 3D Multi-Chip Integration through Low-Temperature Polymer-to-Polymer Bonding", Acs Applied Electronic Materials,10.1021/acsaelm.4c00577

"Improving Cell Current in 3D NAND Flash Memory with Fixed Oxide Charge" (submitted)

Sang Woo Park, Seul Ki Hong, Sarah Eunkyung Kim, and Jong Kyung Park, "First Demonstration of Enhanced Cu-Cu Bonding at Low Temperature with Ruthenium Passivation Layer", IEEE Access. (Accept @ 2024.05)

Min Seong Jeong, Sang Woo Park, Yeon Ju Kim, Jihun Kim, Seul Ki Hong, Sarah Eunkyung Kim, and Jong Kyung Park, "Unraveling diffusion behavior in Cu-to-Cu direct bonding with metal passivation layers", Scientific Reprorts14, 6665 (2024). 

▶ Yeeun Kim, Seoul Ki Hong, and Jong Kyung Park, "Optimizing Confined Nitride Trap Layers for Improved Z-Interference in 3D NAND Flash Memory", Electronics. 13, no. 6: 1020.

 J. K. Park, and S. K. Hong, "Phase-Shift Controller for Analog Device Application using 2-D Material", Carbon lett. (Accept @ 2024.02)



 J. K. Park, and S. K. Hong, "A Self-Aligned Process for Simultaneous Fabrication of Short Channel and Spacer in Semiconductor Devices", Journal of Semiconductor Technology and Science. (Accept @ 2023.12)



Kim Yeon Ju, Park Sang Woo, Jung Min Seong, Kim Ji Hun and Park Jong Kyung, "A Review on the Bonding Characteristics of SiCN for Low-temperature Cu Hybrid Bonding", Journal of the Microelectronics and Packaging Society, 30(4), 8-16 (2023).


  T. Y, Hong, S. E. Kim, J. K. Park, and S. K. Hong, "Guidelines for Area Ratio between Metal Lines and Vias to Improve the Reliability of Interconnect  Systems in High-Density Electronic Devices" Electronics., 12(21), 4403, (2023).

  Park, Jong Kyung, and Sarah Eunkyung Kim. 2022. "A Review of Cell Operation Algorithm for 3D NAND Flash Memory" Applied Sciences 12, no. 21: 10697. 

Prior to SeoulTech

  Kim, S. Y., Park, J. K., Hwang, W. S., Lee, S. J., Lee, K. H., Pyi, S. H., & Cho, B. J. (2016). "Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory". Journal of nanoscience and nanotechnology16(5), 5044–5048.

  Park, J. K., Lee, K.-H., Pyi, S. H., Lee, S.-H., & Cho, B. J. (2014). "Improvement of the multi-level cell performance by a soft program method in flash memory devices". Solid-State Electronics, 94, 86-90.

 Sik Hwang, W., Remskar, M., Yan, R., Kosel, T., Kyung Park, J., Jin Cho, B., Haensch, W., Xing, H., Seabaugh, A., & Jena, D. (2013). "Comparative study of chemically synthesized and exfoliated multilayer MoS2 field-effect transistors". Applied Physics Letters, 102(4). 

 Park, J. K., Lee, S.-H., Oh, J. S., Lee, K.-H., Pyi, S. H., & Cho, B. J. (2012). "Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer". Applied Physics Express, 5(8), 081102. 

 Song, S. M., Park, J. K., Sul, O. J., & Cho, B. J. (2012). "Determination of Work Function of Graphene under a Metal Electrode and Its Role in Contact Resistance". Nano Letters, 12(8), 3887-3892.

 Park, J. K., Song, S. M., Mun, J. H., & Cho, B. J. (2011). "Graphene Gate Electrode for MOS Structure-Based Electronic Devices". Nano Letters, 11(12), 5383-5386. 

 Park, J. K., Park, Y., Lee, S.-H., Im, S. K., Oh, J. S., Joo, M. S., Hong, K., & Cho, B. J. (2011). "Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device". IEEE Transactions on Electron Devices, 58(10), 3314-3320.


 Park, J. K., Park, Y., Lee, S.-H., Lim, S. K., Oh, J. S., Joo, M. S., Hong, K., & Cho, B. J. (2011). "Mechanism of Date Retention Improvement by High Temperature Annealing of Al2O3 Blocking Layer in Flash Memory Device". Japanese Journal of Applied Physics, 50(4S).


 Park, J. K., Park, Y., Song, M. H., Lim, S. K., Oh, J. S., Joo, M. S., Hong, K., & Cho, B. J. (2010). "Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device". Applied Physics Express, 3(9).

 Park, J. K., Park, Y., Lim, S. K., Oh, J. S., Joo, M. S., Hong, K., & Cho, B. J. (2010). "Improvement of memory performance by high temperature annealing of the Al2O3 blocking layer in a charge-trap type flash memory device". Applied Physics Letters, 96(22).


 Park, Y., Park, J. K., Song, M. H., Lim, S. K., Oh, J. S., Joo, M. S., Hong, K., & Cho, B. J. (2010). "Structural and compositional dependence of gadolinium-aluminum oxide for the application of charge-trap-type nonvolatile memory devices". Applied Physics Letters, 96(5).